Silicon carbide possesses unique electrical and physical properties that make it suitable for high power, high frequency and high temperature electronic devices including ICs. Such properties have fueled an intense research effort in the last several years that has prompted the need to develop larger sized, epi-ready and substantially defect/damage-free silicon carbide wafers.
The preparation of silicon carbide wafers is known to require multiple polishing steps including a mechanical polishing step in which particles which are typically harder than silicon carbide (Mohs hardness of 9, Knoop hardness 2,400-3,000 Kg/mm2), such as boron nitride (BN; Mohs hardness of 9.9, Knoop hardness 4,500-5,000 Kg/mm2) or diamond (Mohs hardness of 10, Knoop hardness 8,000-12,000 Kg/mm2) or Boron Carbide (Mohs hardness 9.35, Knoop hardness 2,900-3,580 Kg/mm2) are used to achieve reasonable silicon carbide polishing rates. The very hard particles required for the mechanical polishing step generally results in a high degree of damage to the silicon carbide surface including scratches and dislocations which generally develop both at the surface and sub-surface of the wafer. The mechanical polishing step is typically followed by a CMP step which uses particles that are still abrasive, but are less abrasive as compared to diamond or BN, such as aluminum oxide (Mohs hardness about 9, Knoop hardness 1,800-2,200 Kg/mm2), titania (Mohs hardness of 5.5 to 6.5 Knoop Hardness 500-600 Kg/mm2), or Garnet Mohs hardness about 8, Knoop hardness 1360 Kg/mm2, silica/quartz (Mohs hardness of 7, Knoop Hardness 900-1,200 Kg/mm2), or zirconia (Mohs hardness about 8, Knoop hardness 1,120 Kg/mm2 to polish the surface regions and attempt to reduce the surface and sub-surface damage induced by the mechanical polishing.
Typically the abrasives that are harder than silicon carbide provide reasonably high polishing rates, but cause significant surface and sub-surface damage. The abrasives which are softer than silicon carbide typically provide low polishing rates, and significantly less damage. Since the CMP particles used are still significantly abrasive, new damage is generated during the CMP process. Moreover, since silicon carbide and silicon carbide comprising materials are generally chemically inert materials, the CMP process typically is very slow, and thus requires a long cycle time, as the slurry chemicals do not react with the silicon carbide comprising surface. Therefore, there is a need to develop new CMP slurries and/or methods for polishing silicon carbide comprising materials which decrease damage and increase the polishing rate.